ADDITIONAL FEATURE:  48 MACROCELLS

CLOCK FREQUENCY-MAX:  20.8 MHZ

IN-SYSTEM PROGRAMMABLE:  NO

JESD-30 CODE:  S-CPGA-P68

JESD-609 CODE:  E0

JTAG BST:  NO

LENGTH:  27.94 MM

MANUFACTURER:  ALTERA CORPORATION

MANUFACTURER PART NUMBER:  EP1800GC-2

MOISTURE SENSITIVITY LEVEL:  1

NUMBER OF DEDICATED INPUTS:  12

NUMBER OF I/O LINES:  48

NUMBER OF MACRO CELLS:  48

NUMBER OF TERMINALS:  68

OPERATING TEMPERATURE-MAX:  70 °C

OPERATING TEMPERATURE-MIN:  0 °C

ORGANIZATION:  12 DEDICATED INPUTS, 48 I/O

OUTPUT FUNCTION:  MACROCELL

PACKAGE BODY MATERIAL:  CERAMIC, METAL-SEALED COFIRED

PACKAGE CODE:  WPGA

PACKAGE DESCRIPTION:  WPGA, PGA68,11X11

PACKAGE EQUIVALENCE CODE:  PGA68,11X11

PACKAGE SHAPE:  SQUARE

PACKAGE STYLE:  GRID ARRAY, WINDOW

PART PACKAGE CODE:  PGA

PBFREE CODE:  NO

PEAK REFLOW TEMPERATURE (CEL):  220

PIN COUNT:  68

POWER SUPPLIES:  5 V

PROGRAMMABLE LOGIC TYPE:  UV PLD

PROPAGATION DELAY:  70 NS

QUALIFICATION STATUS:  NOT QUALIFIED

SEATED HEIGHT-MAX:  5.0038 MM

SUBCATEGORY:  PROGRAMMABLE LOGIC DEVICES

SUPPLY VOLTAGE-MAX:  5.25 V

SUPPLY VOLTAGE-MIN:  4.75 V

SUPPLY VOLTAGE-NOM:  5 V

SURFACE MOUNT:  NO

TECHNOLOGY:  CMOS

TEMPERATURE GRADE:  COMMERCIAL

TERMINAL FINISH:  TIN/LEAD (SN/PB)

TERMINAL FORM:  PIN/PEG

TERMINAL PITCH:  2.54 MM

TERMINAL POSITION:  PERPENDICULAR

TIME@PEAK REFLOW TEMPERATURE-MAX (S):  30

WIDTH:  27.94 MM